This paper presents a new analytical propagation delay model for deep submicron CMOS inverters. The model is inspired by the key observation that the inverter delay is a complicated function of several process parameters as well as load capacitance. These relationships are considered by fitting functions for each parameter derived from the Curve Fitting Toolbox in Matlab. Compared to SPICE simulations based on the BSIM4 transistor model, the analytical delay model shows very good accuracy with an average error less than 2% over a wide range of process parameters and output loads. Hence, the proposed model can be efficiently used for different technology nodes as well as statistical gate delay characterisation.
from cs updates on arXiv.org http://ift.tt/2lLPSvw
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